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Fast FPGA-based serial receiver design

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F21%3A43963913" target="_blank" >RIV/49777513:23220/21:43963913 - isvavai.cz</a>

  • Result on the web

    <a href="https://ieeexplore.ieee.org/document/9653394" target="_blank" >https://ieeexplore.ieee.org/document/9653394</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/TELFOR52709.2021.9653394" target="_blank" >10.1109/TELFOR52709.2021.9653394</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Fast FPGA-based serial receiver design

  • Original language description

    This paper describes a fast serial digital signal receiver for applications in nuclear instrumentation. The proposed design uses a Microsemi Polarfire FPGA embedded Ethernet transceiver for data oversampling (with frequency up to 12.7 GHz) and deserialization. The subsequent FPGA implemented digital signal processing chain then analyses the oversampled data array (at least 4 samples per data bit are required by the processing logic). This processing chain begins with a frame buffer, which ensures that the entire sampled data frame can be captured and a 5-bit majority parallel filter. Following start sequence detection logic uses a comparator array for valid data triggering and data offset evaluation. These information are then used by the sampling point selection logic for data restoration. Thanks to the single clock cycle operation of each of these logic blocks, the processing chain provides a constant propagation delay and no dead time is required between individual data frames. The device prototype based on this design is described and measurement results for a data bit rate of 400 MHz and a sampling rate of 3.2 GHz are presented.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2021

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    2021 29th Telecommunications Forum (TELFOR) : Proceedings

  • ISBN

    978-1-66542-584-1

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    1-4

  • Publisher name

    IEEE

  • Place of publication

    Piscataway

  • Event location

    online, Belgrade, Serbia

  • Event date

    Nov 23, 2021

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article