Neural network with MIN/MAX nodes for image recognition and its implementation in programmable logic devices
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23640%2F03%3A00000046" target="_blank" >RIV/49777513:23640/03:00000046 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Neural network with MIN/MAX nodes for image recognition and its implementation in programmable logic devices
Original language description
The article deals with a method of image recognition based on neural networks composed of MIN/MAX nodes. The general concepts of the MIN/MAX nodes and the neural networks are outlined. The developed software system is then briefly introduced. Finall y, the design of the neural networks in VHDL (VHSIC Hardware Description Language) is presented.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/LN00B084" target="_blank" >LN00B084: Research Centre for New Technologies in the Region of West Bohemia</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2003
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
IEEE International Conference on Computational Cybernetics
ISBN
963-7154-17-5
ISSN
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e-ISSN
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Number of pages
3
Pages from-to
113-115
Publisher name
BMF Budapest
Place of publication
Budapest
Event location
Siófok
Event date
Aug 29, 2003
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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