Loopback Control System - FPGA Implementation And Timing Constrains Analysis

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F60162694%3AG43__%2F10%3A00425769" target="_blank" >RIV/60162694:G43__/10:00425769 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Loopback Control System - FPGA Implementation And Timing Constrains Analysis
Original language description
There have been a standard in the power electronic systems to use a pulse width modulation (PWM) to control actuator or energy transfer for several decades. Modern digital technologies give us novel possibilities to control power electronics snore effectively and to use more flexible approaches as well as more complex mathematical theories. The very basic above all of the implementations is to design a loopback control system including several digitalized inputs and PWM outputs. Our effort is to presentthe performance analysis of the loopback control system implemented into the FPGA platform connected to the input AD converter by a serial bus.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F09%2F0013" target="_blank" >GA102/09/0013: Bi-directional dc-dc Converters of Photovoltaic Systems with Maximum Power Tracker</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2010
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
International Conference on Military Technologies (ICMT'09)
ISBN
978-80-7231-649-6
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
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Publisher name
University of Defence
Place of publication
Brno
Event location
Brno
Event date
Jan 1, 2009
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000284810600025

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