Memristor Emulators
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F60162694%3AG43__%2F14%3A00499412" target="_blank" >RIV/60162694:G43__/14:00499412 - isvavai.cz</a>
Alternative codes found
RIV/00216305:26220/14:PU107400
Result on the web
<a href="http://vavtest.unob.cz/registr" target="_blank" >http://vavtest.unob.cz/registr</a>
DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Memristor Emulators
Original language description
There are three possible stages of exploring the memristor as the fourth fundamental circuit element: 1. Generation of the model, 2. Simulation of the element behavior with the aid of the model, and 3. Hardware emulation of the memristor. This Chapter deals with the third stage, describing circuit ideas of memristor emulators for practical laboratory experiments.
Czech name
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Czech description
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Classification
Type
C - Chapter in a specialist book
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/GAP102%2F10%2F1614" target="_blank" >GAP102/10/1614: Memristive, memcapacitative, and meminductive systems: basic research, modeling, and simulation</a><br>
Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace
Others
Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Book/collection name
Memristor Networks
ISBN
978-3-319-02629-9
Number of pages of the result
17
Pages from-to
487-503
Number of pages of the book
720
Publisher name
Springer International Publishing
Place of publication
New York, USA
UT code for WoS chapter
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