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Chua’s Table as a Tool for Constructing Dual Networks

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F60162694%3AG43__%2F19%3A00537383" target="_blank" >RIV/60162694:G43__/19:00537383 - isvavai.cz</a>

  • Alternative codes found

    RIV/68407700:21230/19:00335105

  • Result on the web

    <a href="https://dx.doi.org/10.1109/APCCAS47518.2019.8953176" target="_blank" >https://dx.doi.org/10.1109/APCCAS47518.2019.8953176</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/APCCAS47518.2019.8953176" target="_blank" >10.1109/APCCAS47518.2019.8953176</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Chua’s Table as a Tool for Constructing Dual Networks

  • Original language description

    Chua’s table is presented as a tool for transforming circuits, compounded from nonlinear higher-order elements, into their dual mutations. The transformation is carried out via three assorted operations in Chua’s table, denoted as FLIP, SHIFT, and MOVE. It is shown that their combination can yield dual circuits with interesting parameters, and that the dual circuits can be used for efficient modeling or hardware emulation of the original circuits, for example the circuits containing memristors.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

    <a href="/en/project/TE01020186" target="_blank" >TE01020186: Integrated Satellite and Terrestrial Navigation Technologies Centre</a><br>

  • Continuities

    I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Others

  • Publication year

    2019

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

  • ISBN

    978-172812940-2

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    145-148

  • Publisher name

    IEEE

  • Place of publication

    USA

  • Event location

    Bangkok, Thajsko

  • Event date

    Nov 11, 2019

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000530745700037