Netlist Compiler for Graphical Framework Design

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F61989100%3A27240%2F03%3A00008309" target="_blank" >RIV/61989100:27240/03:00008309 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Netlist Compiler for Graphical Framework Design

Original language description

This paper presents graphic framework design solution for digital systems design, especially for digital filter creation. FPGA programmable devices are expected as target devices for the implementation. However the framework tool is more universal due tooutgoing data format, which is a standard VHDL file. An VHDL is very popular due to its standardization and good portability. However, expressive advantage of schematic design still remains in this project - lucidity and clarity of the graphical description form, especially in hierarchical designs.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JB - Sensors, detecting elements, measurement and regulation

OECD FORD branch

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Project

<a href="/en/project/GA102%2F02%2F1032" target="_blank" >GA102/02/1032: Embedded control systems and their inter-communication</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2003

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Electronic Devices and Systems - EDS 2003

ISBN

80-214-2452-4

ISSN

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e-ISSN

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Number of pages

500

Pages from-to

102-105

Publisher name

Vysoké učení technické v Brně

Place of publication

Brno

Event location

TU Brno

Event date

Sep 9, 2003

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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