Mixed Signal SoC Cost Effective Testing
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F61989100%3A27240%2F03%3A00008399" target="_blank" >RIV/61989100:27240/03:00008399 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Mixed Signal SoC Cost Effective Testing
Original language description
The design and test design of mixed signal systems on the chip are described in the article. The parameters are evaluated including the price as a main important parameter. The various methods are used for evaluations.
Czech name
—
Czech description
—
Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
—
Result continuities
Project
<a href="/en/project/GA102%2F01%2F1531" target="_blank" >GA102/01/1531: Formal approaches in digital circuit diagnostics - testable design verification</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2003
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proc. of 10th Elecronic Devices and Systems Conference 2003
ISBN
ISBN 80-214-245
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
118-121
Publisher name
Elsevier
Place of publication
Brusel
Event location
Brno
Event date
Sep 9, 2003
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
—