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Implementation of BM3D filter on intel xeon phi for rendering in blender cycles

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F61989100%3A27740%2F18%3A10240535" target="_blank" >RIV/61989100:27740/18:10240535 - isvavai.cz</a>

  • Result on the web

    <a href="https://link.springer.com/chapter/10.1007%2F978-3-319-97136-0_8" target="_blank" >https://link.springer.com/chapter/10.1007%2F978-3-319-97136-0_8</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1007/978-3-319-97136-0_8" target="_blank" >10.1007/978-3-319-97136-0_8</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Implementation of BM3D filter on intel xeon phi for rendering in blender cycles

  • Original language description

    In this paper parallel implementation of Sparse 3D Transform-Domain Collaborative filter (BM3D) on the Intel Xeon Phi architecture is presented. Efficiency of the implementation in terms of speedup compared to serial implementation of the filter is demonstrated on denoising of rendered images. We also provide comparison with another parallel CPU version and show that ours performs better. Using the state-of-the-art image filters such as BM3D offers powerful denoising capability in the area of image filtering. To achieve the highest possible quality of the result, the filter has to perform multiple demanding tasks over a single image. Effective implementation of the filter is therefore very important. This is also the case, when filtering is used for image rendering. Rendering times can be significantly decreased by application of powerful time efficient denoising filters. Unfortunately the existing serial implementation of the BM3D filter is time consuming. In this paper we provide efficient parallel implementation of the BM3D filter, and we apply it as a noise reduction technique to the rendered images that reduces the rendering times. We also provide an optimized version of the filter for the Intel Xeon Phi and Intel Xeon architecture.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Result continuities

  • Project

    <a href="/en/project/LM2015070" target="_blank" >LM2015070: IT4Innovations National Supercomputing Center</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2018

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Volume 11087

  • ISBN

    978-3-319-97135-3

  • ISSN

    0302-9743

  • e-ISSN

    1611-3349

  • Number of pages

    14

  • Pages from-to

    101-114

  • Publisher name

    Springer

  • Place of publication

    Cham

  • Event location

    Karolinka

  • Event date

    May 22, 2017

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article