Project of IPv6 Router with FPGA Hardware Accelerator

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F63839172%3A_____%2F03%3A00000004" target="_blank" >RIV/63839172:_____/03:00000004 - isvavai.cz</a>

Alternative codes found

RIV/00216224:14610/03:00008872

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Project of IPv6 Router with FPGA Hardware Accelerator

Original language description

This paper deals with a hardware accelerator as a part of the Liberouter project which is focused on design and implementation of a PC based IPv6 router. Major part of the Liberouter project is the development of a hardware accelerator---the PCI board called Combo6 and its FPGA design which allows processing most of network traffic in hardware.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JC - Computer hardware and software

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2003

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Field-Programmable Logic and Applications, 13th International Conference FPL 2003, Proceedings

ISBN

3-540-40822-3

ISSN

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e-ISSN

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Number of pages

4

Pages from-to

964-967

Publisher name

Springer Verlag

Place of publication

Lisboa

Event location

Lisboa

Event date

Jan 1, 2003

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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