Implementation of 100GE card with hardware acceleration
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F63839172%3A_____%2F12%3A00007290" target="_blank" >RIV/63839172:_____/12:00007290 - isvavai.cz</a>
Result on the web
<a href="https://tnc2012.terena.org/core/presentation/83" target="_blank" >https://tnc2012.terena.org/core/presentation/83</a>
DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Implementation of 100GE card with hardware acceleration
Original language description
In this paper we describe the newest standard of 40/100 Gb/s Ethernet in some detail. We present implementation of the two-port 100 Gb/s Ethernet card based on Xilinx FPGA - COMBO-HXT.
Czech name
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Czech description
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Classification
Type
A - Audiovisual production
CEP classification
IN - Informatics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/LM2010005" target="_blank" >LM2010005: Large Infrastructure CESNET</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2012
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
ISBN
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Place of publication
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Publisher/client name
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Version
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Carrier ID
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