Logarithmic number system and floating-point arithmetics on FPGA.
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F02%3A16020081" target="_blank" >RIV/67985556:_____/02:16020081 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Logarithmic number system and floating-point arithmetics on FPGA.
Original language description
This work has demonstrated that it is possible to design a LNS arithmetic core library of a practical word length. All main arithmetic algorithms were shown. A small case study has shown that for some applications provides the LNS solution substantiallybetter performance while consuming a comparable area. The strengths of the LNS lies in fast multiplications, divisions, squares and square roots. It allows us to implement algorithms that are not suitable for pipelining.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
<a href="/en/project/LN00B096" target="_blank" >LN00B096: Center for Applied Cybernetics</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2002
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream.
ISBN
3-540-44108-5
ISSN
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e-ISSN
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Number of pages
10
Pages from-to
627-636
Publisher name
Springer
Place of publication
Berlin
Event location
Montpellier [FR]
Event date
Sep 2, 2002
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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