Passive coherent location FPGA implementation of the cross ambiguity function

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F05%3A00030431" target="_blank" >RIV/67985556:_____/05:00030431 - isvavai.cz</a>

Result on the web

—

DOI - Digital Object Identifier

—

Result language

angličtina

Original language name

Passive coherent location FPGA implementation of the cross ambiguity function

Original language description

One fo key problem in passive coherent location (PCL) is effective and accurate computation of the cross ambiguity function (CAF). The CAF represent power spectral density distribution of the cross correlation between direct and reflected signals. Regarding above mentioned reason has to be important develop optimal implementation of the HW architecture based on FPGA for CFA computation. The paper presents design of the PC accelerator card for CAF computation based on Xilinx FPGA processor.

Czech name

—

Czech description

—

Type

D - Article in proceedings

CEP classification

JC - Computer hardware and software

OECD FORD branch

—

Project

—

Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2005

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Proceedings of SPIE: Signal Processing Symposium 2005

ISBN

0-8194-6211-X

ISSN

—

e-ISSN

—

Number of pages

7

Pages from-to

—

Publisher name

SPIE

Place of publication

Warszawa

Event location

Wilga

Event date

Jun 3, 2005

Type of event by nationality

EUR - Evropská akce

UT code for WoS article

—