Proposed architecture of configurable, adaptable SoC

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F08%3A00309238" target="_blank" >RIV/67985556:_____/08:00309238 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Proposed architecture of configurable, adaptable SoC
Original language description
To study the concept of Self Adaptive Networked computing Elements (SANE) we developed a configurable platform based on the Xilinx EDK and Xilinx System Generator tools. The platform is built around a MicroBlaze CPU with a set of standard peripherals such as DDR RAM controller and RS232 interface ? denoted as Master, extended with a set of several reprogrammable Accelerators connected to the MicroBlaze Master via fast simplex links (FSL).
Czech name
Návrh architektury pro rekonfigurovatelné a adaptovatelné systémy na jednom čipu
Czech description
Pro studium SANE jsme navrhli konfigurovatelnou platformu, která kombinuje procesor MicroBlaze a sadu rekonfigurovatelných akcelerátorů připojených pomocí FSL linek na jediném FPGA obvodu.

Project
<a href="/en/project/2C06008" target="_blank" >2C06008: Virtual Laboratory of Microprocessor Technology Application</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2008
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
The IET Irish Signals and Systems Conference ISSC 2008
ISBN
978-0-86341-931-7
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
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Publisher name
Institution of Engineering and Technology
Place of publication
Londýn
Event location
Galway
Event date
Jun 18, 2008
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
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