AVR Core Supported Dynamic Reconfiguration

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F04%3A03098942" target="_blank" >RIV/68407700:21230/04:03098942 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

AVR Core Supported Dynamic Reconfiguration

Original language description

This paper presents a software core for anuniversal reconfiguration system-on-a-programmable chipplatform based on Atmel AT94K FPSLIC with an externalFLASH memory. The AVR core controls basic functionsthat together with the FPSLIC platform creates atransparent infrastructure for software-driven FPGAreconfiguration.

Czech name

Není k dispozici

Czech description

Není k dispozici

Type

A - Audiovisual production

CEP classification

JC - Computer hardware and software

OECD FORD branch

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Project

<a href="/en/project/GA102%2F04%2F2137" target="_blank" >GA102/04/2137: Design of highly reliable control systems built on dynamically reconfigurable FPGAs.</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2004

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

ISBN

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Place of publication

Praha

Publisher/client name

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Version

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Carrier ID

neuvedeno