Implementation of Basic Arithmetic Operations in FPGA
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F04%3A03101158" target="_blank" >RIV/68407700:21230/04:03101158 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Implementation of Basic Arithmetic Operations in FPGA
Original language description
Analysis of FPGA architecture support for arithmetic operations. Implementation of fixed-point operations.
Czech name
Není k dispozici
Czech description
Není k dispozici
Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
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Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2004
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Počítačové architektúry a diagnostika
ISBN
80-969202-0-0
ISSN
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e-ISSN
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Number of pages
3
Pages from-to
13-15
Publisher name
Ústav informatiky SAV
Place of publication
Bratislava
Event location
Moravany nad Vahom
Event date
Sep 15, 2004
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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