Electronic Circuit Design Using Multiobjective Optimization

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F07%3A03132381" target="_blank" >RIV/68407700:21230/07:03132381 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Electronic Circuit Design Using Multiobjective Optimization

Original language description

This paper presents a variation and extension of a previously existing method for multiobjective optimization known as Goal Attainment Method (GAM). The method GAM is in this research combined with a mechanism that automatically provides a set of parameters (weights, coordinates of the reference point) for which the method generates noninferior solutions uniformly spread over a suitably chosen part of the Pareto front. The resulting set of solutions is then presented in a graphic form to the designer sothat the solution representing the most satisfactory tradeoff can be easily chosen. The whole algorithm was implemented as a program and tested on two RF design examples (an LNA and a power amplifier), whose optimization results are also presented in the paper.

Czech name

Electronic Circuit Design Using Multiobjective Optimization

Czech description

This paper presents a variation and extension of a previously existing method for multiobjective optimization known as Goal Attainment Method (GAM). The method GAM is in this research combined with a mechanism that automatically provides a set of parameters (weights, coordinates of the reference point) for which the method generates noninferior solutions uniformly spread over a suitably chosen part of the Pareto front. The resulting set of solutions is then presented in a graphic form to the designer sothat the solution representing the most satisfactory tradeoff can be easily chosen. The whole algorithm was implemented as a program and tested on two RF design examples (an LNA and a power amplifier), whose optimization results are also presented in the paper.

Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

<a href="/en/project/GA102%2F05%2F0277" target="_blank" >GA102/05/0277: Current- and hybrid-mode circuits for analog signal processing</a><br>

Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2007

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Proceedings of the 50th IEEE International Midwest Symposium on Circuits and Systems

ISBN

978-1-4244-1175-7

ISSN

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e-ISSN

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Number of pages

4

Pages from-to

734-737

Publisher name

IEEE

Place of publication

Piscataway

Event location

Montreal

Event date

Aug 5, 2007

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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