FPGA Based Tester Tool for Hybrid Real-Time Systems
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F08%3A03146822" target="_blank" >RIV/68407700:21230/08:03146822 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
FPGA Based Tester Tool for Hybrid Real-Time Systems
Original language description
This paper presents a design methodology for a hybrid Hardware-in-the-Loop (HIL) tester tool, based on both discrete event system theory, given by timed automata, and continuous systems theory, given by difference equations. It is implemented using an FPGA platform that guarantees speed enhancement, time accuracy and extensibility with no performance loss. We have focused on the implementation of a discrete event system, specifically timed automata into FPGA, and we have linked them with continuous systems implemented as filters in fixed point arithmetic. The paper shows a methodology, which employs widely used tools (Matlab, UPPAAL) as a user interface, and which implements the FPGA based tester tool.
Czech name
FPGA Testovaci nastroj pro hybridnich systemy realneho casu
Czech description
Článek prezentuje nástroj pro testování hybridních systémů v uzavřené smyčce. Spojitá část systému je reprezentována pomocí diferenčních rovnic a část sytému diskrétních událostí je reprezentována časovanými automaty. Nástroj je implementován pomocí konfigurovatelných hradlových polí (FPGA) zajišťujících rychlost, časovou determinističnost a snadnou rozšiřitelnost.
Classification
Type
J<sub>x</sub> - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
<a href="/en/project/FT-TA3%2F044" target="_blank" >FT-TA3/044: *Module solution of FLY-BY-WIRE control system for light, jet aircraft.</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2008
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
Microprocessors and Microsystems
ISSN
0141-9331
e-ISSN
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Volume of the periodical
32
Issue of the periodical within the volume
8
Country of publishing house
NL - THE KINGDOM OF THE NETHERLANDS
Number of pages
13
Pages from-to
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UT code for WoS article
000261457100004
EID of the result in the Scopus database
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