Analysis of capacitive coupling in CMOS integrated circuits
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F08%3A03147667" target="_blank" >RIV/68407700:21230/08:03147667 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Analysis of capacitive coupling in CMOS integrated circuits
Original language description
Analysis of capacitive coupling in CMOS integrated circuits
Czech name
Analýza kapacitnich vazeb v CMOS integrovaných obvodech
Czech description
Analýza kapacitnich vazeb v CMOS integrovaných obvodech
Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/GA102%2F06%2F1624" target="_blank" >GA102/06/1624: Micro and nano sensor structures and systems with embedded intelligence (MINASES)</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2008
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Electronics Devices and Systems Proceedings
ISBN
978-80-214-3717-3
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
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Publisher name
Vysoké učení technické v Brně
Place of publication
Brno
Event location
Brno
Event date
Sep 10, 2008
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
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