AN INNOVATIVE VERIFICATION APPROACH FOR NYQUIST-RATE A/D CONVERTERS

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F09%3A00157675" target="_blank" >RIV/68407700:21230/09:00157675 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
AN INNOVATIVE VERIFICATION APPROACH FOR NYQUIST-RATE A/D CONVERTERS
Original language description
Environment for testing static parameters of analog-to-digital converters is presented in this article. It is a novel concept of powerful engine suitable for design and verification of generic type ADCs in Mentor Graphics IC Studio software. The source code of each block of the design is written in Verilog-A which offers relatively effortless portability on different design systems (e.g. Cadence). The core of our proposal is based on Servo-Loop with improved search algoritm. The simulation outputs are curves of static INL and DNL.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F07%2F1186" target="_blank" >GA102/07/1186: Sophisticated methods of the analog and mixed-signal circuits design in sub-micron technologies</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2009
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Electronic Devices and Systems, IMAPS CS International Conference 2009 Proceedings
ISBN
978-80-214-3933-7
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
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Publisher name
VUT v Brně, FEI
Place of publication
Brno
Event location
Brno
Event date
Sep 2, 2009
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
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