An Innovative Verification Approach For Nyquist-rate A/D Converters - Algorithm and Implementation

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F09%3A00164393" target="_blank" >RIV/68407700:21230/09:00164393 - isvavai.cz</a>

Result on the web

—

DOI - Digital Object Identifier

—

Result language

angličtina

Original language name

An Innovative Verification Approach For Nyquist-rate A/D Converters - Algorithm and Implementation

Original language description

Environment for testing static parameters of analog-to-digital converters is presented in this article. It is a novel concept of powerful engine suitable for design and verification of generic type ADCs in Mentor Graphics IC Studio software. The source code of each block of the design is written in Verilog-A which offers relatively effortless portability on different design systems (e.g. Cadence). The core of our proposal is based on Servo-Loop with improved search algoritm [1]. The simulation outputs are curves of static INL and DNL. Here, we focus mainly on algorithm and implementation of testing interface.

Czech name

—

Czech description

—

Type

J_x - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

—

Project

<a href="/en/project/GA102%2F07%2F1186" target="_blank" >GA102/07/1186: Sophisticated methods of the analog and mixed-signal circuits design in sub-micron technologies</a><br>

Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2009

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

ElectroScope

ISSN

1802-4564

e-ISSN

—

Volume of the periodical

2009

Issue of the periodical within the volume

2

Country of publishing house

CZ - CZECH REPUBLIC

Number of pages

5

Pages from-to

—

UT code for WoS article

—

EID of the result in the Scopus database

—