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Versatile Engine for Virtual Testing of ADC/DAC Non-Linearity

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F10%3A00173361" target="_blank" >RIV/68407700:21230/10:00173361 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Versatile Engine for Virtual Testing of ADC/DAC Non-Linearity

  • Original language description

    We propose a novel versatile engine for behavioral or transistor-level design verification of data converters. This tool is dedicated to IC designers to verify static performance of the converters during their design. It is based on advanced Servo-Loop method presented in and extended by features such as innovative DAC testing method. The environment proposed supports various converter resolutions and several types of digital coding.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JA - Electronics and optoelectronics

  • OECD FORD branch

Result continuities

  • Project

  • Continuities

    Z - Vyzkumny zamer (s odkazem do CEZ)

Others

  • Publication year

    2010

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    The International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design 2010

  • ISBN

    978-1-4244-6815-7

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

  • Publisher name

    IEEE - Tunisia

  • Place of publication

    Tunis

  • Event location

    Gammarth

  • Event date

    Oct 4, 2010

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article