New Sparse Matrix Ordering Techniques for Computer Simulation Of Electronics Circuits
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F12%3A00198163" target="_blank" >RIV/68407700:21230/12:00198163 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
New Sparse Matrix Ordering Techniques for Computer Simulation Of Electronics Circuits
Original language description
Engineers and technicians rely on many computer tools, which help them in the development of new devices. Especially in the electronic circuit design, there is required advantageous and complex equipment. This paper makes a brief introduction to the basic problematic of electronic circuit's simulation. It proposes the key principles for developing modern simulators and possible further steps in computer simulation and circuit design. Main part of the article presents a novel sparse matrix ordering techniques specially developed for solving LU factorization. LU factorization is critical part of any electronic circuit simulation. This paper also presents complete description of backward and forward conversion of the new sparse matrix ordering techniques.The comparison of performance of standard matrix storages and novel sparse matrix ordering techniques is summarized at the end of this article.
Czech name
—
Czech description
—
Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
—
Result continuities
Project
<a href="/en/project/GAP102%2F10%2F1665" target="_blank" >GAP102/10/1665: Symbolic and Semisymbolic Methods for Power and Mechatronic Applications</a><br>
Continuities
S - Specificky vyzkum na vysokych skolach
Others
Publication year
2012
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
3rd European Conference of Circuit Technology and Devices
ISBN
978-1-61804-138-8
ISSN
—
e-ISSN
—
Number of pages
5
Pages from-to
247-251
Publisher name
North Atlantic University Union
Place of publication
NY
Event location
Paris
Event date
Dec 2, 2012
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
—