Measurement of Parasitic Signals in Structures of Integrated Circuits

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F12%3A00199496" target="_blank" >RIV/68407700:21230/12:00199496 - isvavai.cz</a>
Result on the web
<a href="http://www.imaps.cz/eds2012/general-invitation.htm" target="_blank" >http://www.imaps.cz/eds2012/general-invitation.htm</a>
DOI - Digital Object Identifier
—

Result language
angličtina
Original language name
Measurement of Parasitic Signals in Structures of Integrated Circuits
Original language description
t is impossible to measure direct the rapid variations voltage between leads inside the IC. The measuring integrated circuit contains additionally flash A/D converter. This one converts voltage of measured leads to a digital form. Digital data can be analyzed outside the IC without waveform distortions.
Czech name
—
Czech description
—

Project
<a href="/en/project/VG20102015015" target="_blank" >VG20102015015: Miniature intelligent system for analyzing concentrations of gases and pollutants, particularly toxic</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2012
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of Electronic Devices and Systems EDS 2012
ISBN
978-80-214-4539-0
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
39-42
Publisher name
VUT v Brně, FEKT
Place of publication
Brno
Event location
Brno
Event date
Jun 28, 2012
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
—

Similar results(10)