Modeling of Spiral Polysilicon Divider in High Voltage MOSFET Transistor and Leakage
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F15%3A00242375" target="_blank" >RIV/68407700:21230/15:00242375 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Modeling of Spiral Polysilicon Divider in High Voltage MOSFET Transistor and Leakage
Original language description
The power consumption is one of the most important integrated circuit parameters. It is crucial to know the circuit’s estimated leakage power since such a bound will enable the designers to ensure that the circuit meets the standby power constraints which impacts battery life in portable devices. It means that the leakage of MOSFET devices have to be modeled accurately. The first fundamental thesis aim is the accurate gate dimension dependent drain and source leakage modeling. The second fundamental thesis aim is the enhanced model of high voltage spiral divider that allows designing of circuits that can actively control the power consumption.
Czech name
—
Czech description
—
Classification
Type
O - Miscellaneous
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
—
Result continuities
Project
—
Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace
Others
Publication year
2015
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů