An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F17%3A00315357" target="_blank" >RIV/68407700:21230/17:00315357 - isvavai.cz</a>
Result on the web
<a href="https://www.radioeng.cz/fulltexts/2017/17_02_0515_0521.pdf" target="_blank" >https://www.radioeng.cz/fulltexts/2017/17_02_0515_0521.pdf</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.13164/re.2017.0515" target="_blank" >10.13164/re.2017.0515</a>

Result language
angličtina
Original language name
An Effect of Output Capacitor ESL on Hysteretic PLL Controlled Multiphase Buck Converter
Original language description
This paper provides analysis of output capacitor effects to phase stability of a hysteretic mode controlled buck converter. The hysteretic control method is a simple and fast control technique for switched-mode converters, but the hysteresis control is not oscillator referenced. It results in difficulty to achieve stable switching phase and frequency. In recent papers, the authors propose a use of phase locked loops (PLL) to permit interleaved multiphase operation where each voltage regulator (VR) module is coupled together via output node and leads to a strong loop interaction. In this work analysis of this interaction is studied by Matlab Simulink simulations and a new solution how to partially suppress this effect is given. The proposed method confirms the theoretical analysis.
Czech name
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Czech description
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Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering

Publication year
2017
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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