GEEC: Graphic editor of electrical circuits
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F17%3A00319411" target="_blank" >RIV/68407700:21230/17:00319411 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
GEEC: Graphic editor of electrical circuits
Original language description
This paper presents web-based graphical schematic editor for analysis of electric and electronic circuits. It is a JavaScript application that uses Spice OPUS and Maple with PraCAn package as a computation engine. In case of linear circuits, results can be obtained in symbolic form. Continuous-time linear and nonlinear circuits as well as periodically switched linear (PSL) circuits can be analyzed. All created circuits can be exported to various file formats for greater compatibility with documentation formats and other simulation programs. The whole system is developed at the Department of Circuit Theory, for teaching support and research.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
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Continuities
S - Specificky vyzkum na vysokych skolach
Others
Publication year
2017
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
2017 International Conference on Applied Electronics
ISBN
978-80-261-0641-8
ISSN
1803-7232
e-ISSN
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Number of pages
4
Pages from-to
155-158
Publisher name
University of West Bohemia
Place of publication
Pilsen
Event location
Pilsen
Event date
Sep 5, 2017
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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