Implementation of a Time-to-Digital Converter Inside FPGA

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F23%3A00368091" target="_blank" >RIV/68407700:21230/23:00368091 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/IDAACS58523.2023.10348931" target="_blank" >http://dx.doi.org/10.1109/IDAACS58523.2023.10348931</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/IDAACS58523.2023.10348931" target="_blank" >10.1109/IDAACS58523.2023.10348931</a>

Result language
angličtina
Original language name
Implementation of a Time-to-Digital Converter Inside FPGA
Original language description
This paper is focused on the implementation of a Time-to-Digital Converter (TDC) inside an FPGA circuit aimed at a specific application in the field of comparison of two time scales maintained by primary time standards (atomic clocks). The design requirements of the TDC were tailored to meet the needs of this intended use. That means there is a need for a wide measuring range of hundreds of milliseconds with time resolution as best as possible (smaller than 10 ps). Commercially-available TDCs on the market do not fulfil above mentioned requirements [2]. The implemented TDC utilizes a well-known combination of a delay line and a counter, which provides excellent resolution and a wide measuring range. We have selected FPGA type Cyclone V with 28 nm manufacturing technology to develop the TDC. Thanks to the specialized usage of the FPGA adders as a delay line and manufacturing technology of the used FPGA, we obtained the TDC with a resulting resolution of 8.6 ps. The significant advantages of this solution are flexibility, scalability, simple utilization into any FPGA system and availability to tune measuring range and input control interface based on specific needs.
Czech name
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Czech description
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Publication year
2023
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the The 12th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS) IDAACS’2023
ISBN
979-8-3503-5804-9
ISSN
2770-4254
e-ISSN
2770-4254
Number of pages
5
Pages from-to
79-83
Publisher name
IEEE
Place of publication
Dortmund
Event location
Dortmund
Event date
Sep 7, 2023
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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