Switching Loss Reduction in Dual-Inverter Topologies Using a Modified Generalized Discontinuous PWM Strategy

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F25%3A00386105" target="_blank" >RIV/68407700:21230/25:00386105 - isvavai.cz</a>
Result on the web
<a href="https://doi.org/10.1109/IECON58223.2025.11221563" target="_blank" >https://doi.org/10.1109/IECON58223.2025.11221563</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/IECON58223.2025.11221563" target="_blank" >10.1109/IECON58223.2025.11221563</a>

Result language
angličtina
Original language name
Switching Loss Reduction in Dual-Inverter Topologies Using a Modified Generalized Discontinuous PWM Strategy
Original language description
The Dual-Inverter (DI) topology, composed of two two-level Voltage Source Inverters (VSIs), offers a promising alternative to multilevel inverters. It enables multilevel output capability, efficient DC-link voltage utilization, and inherent fault tolerance. However, it involves twice as many switching events compared to a conventional two-level VSI, resulting in higher power losses. Existing modulation strategies either achieve moderate loss reduction with simple implementation or offer greater efficiency at the cost of increased control complexity. This paper proposes a novel modulation strategy, termed SixStep+GDPWM, that combines simple implementation with effective switching loss reduction. The method operates one inverter in a pseudo six-step mode to minimize switching events, while the second inverter is continuously modulated using a clamped waveform. The clamped interval can be phase-shifted relative to the output current, similar to the Generalized Discontinuous PWM (GDPWM) approach used in classical two-level VSIs. The proposed strategy is verified through simulations, demonstrating reduced switching losses across a wide range of operating points while preserving waveform quality and implementation simplicity.
Czech name
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Czech description
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Publication year
2025
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
IECON 2025 – 51st Annual Conference of the IEEE Industrial Electronics Society
ISBN
979-8-3315-9681-1
ISSN
—
e-ISSN
—
Number of pages
6
Pages from-to
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Publisher name
IEEE Industrial Electronic Society
Place of publication
Vienna
Event location
Madrid
Event date
Oct 14, 2025
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
001691804100550

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