Dual interpolating counter architecture for atomic clock comparison

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F14%3A00226138" target="_blank" >RIV/68407700:21240/14:00226138 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/EWDTS.2014.7027081" target="_blank" >http://dx.doi.org/10.1109/EWDTS.2014.7027081</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/EWDTS.2014.7027081" target="_blank" >10.1109/EWDTS.2014.7027081</a>

Result language
angličtina
Original language name
Dual interpolating counter architecture for atomic clock comparison
Original language description
This paper deals with an accurate time transfer and atomic clocks comparison in a geographically distant locations utilizing the optical lines. A new dual interpolating counter architecture for the clock comparison over an optical network is presented, especially utilizing dense wavelength division multiplexing (DWDM). There are described the time transfer method and the details of the interpolating counter implementation (the interpolator feed and the run time interpolator calibration). Experiences with the current embedded time interval counter design in the FPGA are presented as well.
Czech name
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Czech description
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Project
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Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of IEEE East-West Design & Test Symposium
ISBN
978-1-4799-7630-0
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
32-35
Publisher name
Institute of Electrical and Electronics Engineers
Place of publication
New York
Event location
Kyjev
Event date
Sep 26, 2014
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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