Application specific processor with high level synthesized instructions
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F14%3A00226369" target="_blank" >RIV/68407700:21240/14:00226369 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1145/2554688.2554754" target="_blank" >http://dx.doi.org/10.1145/2554688.2554754</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1145/2554688.2554754" target="_blank" >10.1145/2554688.2554754</a>
Alternative languages
Result language
angličtina
Original language name
Application specific processor with high level synthesized instructions
Original language description
The paper deals with the design of application-specific processor which uses high level synthesized instruction engines. This approach is demonstrated on the instance of high speed network flow measurement processor for FPGA. Our newly proposed concept called Software Defined Monitoring (SDM) relies on advanced monitoring tasks implemented in the software supported by a configurable hardware accelerator. The monitoring tasks reside in the software and can easily control the level of detail retained by the hardware for each flow. This way, the measurement of bulk/uninteresting traffic is offloaded to the hardware, while the interesting traffic is processed in the software. SDM enables creation of flexible monitoring systems capable of deep packet inspection at high throughput. We introduce the processor architecture and a workflow that allows to create hardware accelerated measurement modules (instructions) from the description in C/C++ language. The processor offloads various aggregati
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
IN - Informatics
OECD FORD branch
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Result continuities
Project
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Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace
Others
Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
FPGA '14 Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
ISBN
978-1-4503-2671-1
ISSN
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e-ISSN
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Number of pages
1
Pages from-to
246
Publisher name
ACM
Place of publication
New York
Event location
Monterey, CA
Event date
Feb 26, 2014
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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