Building a Side-Channel Attack Scheme on SipHash FPGA Implementation
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F25%3A00386088" target="_blank" >RIV/68407700:21240/25:00386088 - isvavai.cz</a>
Result on the web
<a href="https://doi.org/10.1109/DSD67783.2025.00033" target="_blank" >https://doi.org/10.1109/DSD67783.2025.00033</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DSD67783.2025.00033" target="_blank" >10.1109/DSD67783.2025.00033</a>
Alternative languages
Result language
angličtina
Original language name
Building a Side-Channel Attack Scheme on SipHash FPGA Implementation
Original language description
This paper introduces a novel side-channel attack scheme targeting FPGA implementations of the SipHash cipher, a cryptographic hash function commonly used for message authentication. At the time of writing, we were unaware of any side-channel attack on hardware implementation of the SipHash. A leakage function was built that is able to compute part of the internal state after 1 round based on just a few bits of the key. Our approach is based on progressively eliminating incorrect subkeys in iterations, while adding new bits of the key we attack, rather than trying to extract the subkey directly. The total amount of key hypothesizes does not exceed a limit when it becomes unfeasible to compute. In the end, all 128 bits of the SipHash key are obtained.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
—
OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
<a href="/en/project/VJ02010010" target="_blank" >VJ02010010: Tools for AI-enhanced Security Verification of Cryptographic Devices</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2025
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 2025 28th Euromicro Conference on Digital System Design
ISBN
979-8-3315-8499-3
ISSN
2639-3859
e-ISSN
2771-2508
Number of pages
5
Pages from-to
160-164
Publisher name
IEEE Computer Society
Place of publication
Los Alamitos
Event location
Salerno
Event date
Sep 10, 2025
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
001717790400021