A Low Power Asynchronous Column-parallel 10-bit Analog to Digital Converter with a High Input Impedance

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21340%2F22%3A00352390" target="_blank" >RIV/68407700:21340/22:00352390 - isvavai.cz</a>
Alternative codes found
RIV/68407700:21230/22:00352390
Result on the web
<a href="https://doi.org/10.1088/1748-0221/17/05/T05016" target="_blank" >https://doi.org/10.1088/1748-0221/17/05/T05016</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1088/1748-0221/17/05/T05016" target="_blank" >10.1088/1748-0221/17/05/T05016</a>

Result language
angličtina
Original language name
A Low Power Asynchronous Column-parallel 10-bit Analog to Digital Converter with a High Input Impedance
Original language description
This paper proposes a low power 10-bit asynchronous fully-differential column analog to digital converter (ADC) with successive approximation (SAR) and charge redistribution in a 180 nm SoI technology. The ADC is designed for use in Spacepix-2 monolithic active pixel sensor.
Czech name
—
Czech description
—

Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
—
OECD FORD branch
20201 - Electrical and electronic engineering

Project
<a href="/en/project/EF16_019%2F0000778" target="_blank" >EF16_019/0000778: Center for advanced applied science</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2022
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Similar results(10)