Mem-Elements Emulator Design With Experimental Validation and Its Application
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21460%2F21%3A00357209" target="_blank" >RIV/68407700:21460/21:00357209 - isvavai.cz</a>
Alternative codes found
RIV/00216305:26220/21:PU140897
Result on the web
<a href="https://doi.org/10.1109/ACCESS.2021.3078189" target="_blank" >https://doi.org/10.1109/ACCESS.2021.3078189</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ACCESS.2021.3078189" target="_blank" >10.1109/ACCESS.2021.3078189</a>
Alternative languages
Result language
angličtina
Original language name
Mem-Elements Emulator Design With Experimental Validation and Its Application
Original language description
An emulator circuit of Memristor, Memcapacitor, and Meminductor commonly termed as mem-elements has been demonstrated in this article. The circuit has been realized using the technique of current mode, which provides better performance over voltage mode counterparts. The current mode analog building blocks, along with a few passive components, have been used in the presented circuit implementation. The fingerprint characteristics have been observed in both simulation and experimental results, validating the theoretical analysis. The robustness of the presented design has been supported by performing different types of analysis like process corner, temperature, and non-volatility behavior. The mem-elements emulator design has been simulated using 0.18 μm TSMC process parameter, and ±1.2 V power supply has been used. The commercial ICs AD844 and CA3080 are used for the experimental demonstration of the proposed mem-elements design by making a prototype on a breadboard. A layout area of 4829 μm 2 , 8098 μm 2 , and 8061 μm 2 respectively is required for the Memristor, Memcapacitor, and meminductor circuit. The power consumed by the mem-elements circuit is also provided. A chaotic has been implemented using mem-elements to show the usefulness of the emulator design.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
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Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace
Others
Publication year
2021
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
IEEE Access
ISSN
2169-3536
e-ISSN
2169-3536
Volume of the periodical
9
Issue of the periodical within the volume
5
Country of publishing house
US - UNITED STATES
Number of pages
16
Pages from-to
69860-69875
UT code for WoS article
000650647200001
EID of the result in the Scopus database
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