Distortion caused by controlling transistor implemented in the voltage controlled amplifier

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F70883521%3A28140%2F20%3A63526751" target="_blank" >RIV/70883521:28140/20:63526751 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Distortion caused by controlling transistor implemented in the voltage controlled amplifier
Original language description
This paper describes a voltage controlled amplifier with linearized response to the controlling voltage and discusses its harmonic distortion. As a controlling element, a JFET transistor has been utilized. The design of the amplifier has been made with the aid of Maple mathematical software and National Instruments Multisim circuit simulator. During the simulations, it was found that the controlling transistor would probably introduce significant distortion into the signal path. Therefore a set of measurements on real circuit was made in order to verify that the SPICE model of the transistor provided relevant results during the simulation. Both, the simulated and the really measured parameters of the amplifier are discussed within the framework of this paper.
Czech name
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Czech description
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Publication year
2020
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
13th International Conference ELEKTRO 2020, ELEKTRO 2020 - Proceedings
ISBN
978-172817542-3
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
1-6
Publisher name
Institute of Electrical and Electronics Engineers Inc.
Place of publication
Piscataway, New Jersey
Event location
Taormina
Event date
May 25, 2020
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000621581100086

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