New Reconfigurable Universal SISO Biquad Filter Implemented by Advanced CMOS Active Elements
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F71226401%3A_____%2F18%3AN0100155" target="_blank" >RIV/71226401:_____/18:N0100155 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/SMACD.2018.8434560" target="_blank" >http://dx.doi.org/10.1109/SMACD.2018.8434560</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/SMACD.2018.8434560" target="_blank" >10.1109/SMACD.2018.8434560</a>
Alternative languages
Result language
angličtina
Original language name
New Reconfigurable Universal SISO Biquad Filter Implemented by Advanced CMOS Active Elements
Original language description
This paper presents new topology of fully universal multi-parametrically and electronically reconfigurable reconnection-less single-input single-output (SISO) voltage-mode biquad filter. The proposed structure can be reconfigured to offer each of all five second-order transfers functions (high-pass, bandpass, low-pass, band-reject and all-pass) as well as setting of pole frequency and quality factor. Special active device called controlled-gain current-controlled differential difference current conveyor of second generation has been designed in 0.35 CMOS technology for purposes of modeling and simulation tests of proposed filter. PSpice simulations confirm intended behavior of the topology.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
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Continuities
I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace
Others
Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
ISBN
978-153865152-0
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
257-260
Publisher name
Institute of Electrical and Electronics Engineers
Place of publication
Praha
Event location
Praha
Event date
Jul 2, 2018
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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