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Symmetric encryption on the FPGA card
The software implements the AES (Advanced Encryption Standard) algorithm for FPGAs (Field Programmable Gate Array) in the VHDL (Hardware Description Language) programming language. The software contains of the cryptographic core of the AES algorithm ...
Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
- 2017 •
- R •
- Link
Rok uplatnění
R - Software
Výsledek na webu
Comparative Analysis of Different Implementations of Encryption Algorithms on FPGA Network Cards
The article compares the suitability of implementation and security of the bestknown symmetric block ciphers. Based on an analysis, the article describes the implementation of AES and Twofish. The article includes block cipher modes of opera...
Computer hardware and architecture
- 2018 •
- D •
- Link
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
High-speed Side-channel-protected Encryption and Authentication in Hardware
This paper describes two FPGA implementations for the encryption andauthentication of data, based on the AES algorithm running in Galois/Counter mode(AES-GCM) the first to describe a throughput-optimized FPGA archi...
Computer hardware and architecture
- 2018 •
- O •
- Link
Rok uplatnění
O - Ostatní výsledky
Výsledek na webu
Hardware acceleration of AES-GCM for SSH protocol
the goal, encryption algorithm Advanced Encryption Standard (AES) in Galois Counter Mode of operation was chosen, which provides data confidentiality, integrity......
Computer hardware and architecture
- 2013 •
- D •
- Link
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards
Encryption Standard) encryption algorithm and the GCM (Galois Counter Mode) mode using a proven algorithm in a secure mode of operation, on a network device......
Computer hardware and architecture
- 2018 •
- D •
- Link
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
Secure Communication Between High-speed Network Gateways
This paper presents Field Programmable Gate Array (FPGA) powered packet-oriented solution for secure communication between high-speed network gateways which provide throughput up to 100 Gpbs in each direction. To ensure data confidentiality and authe...
Communication engineering and systems
- 2022 •
- D •
- Link
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
Hardware-Accelerated Encryption with Strong Authentication
is implemented using the GCM (Galois/Counter Mode) so that both confidentiality and integrity...
Electrical and electronic engineering
- 2017 •
- D
Rok uplatnění
D - Stať ve sborníku
Low-latency AES encryption for High-Frequency Trading on FPGA
) with 256 bit key length in Galoise-Counter Mode (GCM) as the encryption algorithm...
Communication engineering and systems
- 2024 •
- D •
- Link
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
Quantum-resistant hardware-accelerated IoT traffic encryptor
to generate a secure hybrid key for AES-256 encryption in Galois-Counter Mode (GCM). Both...
Communication engineering and systems
- 2025 •
- Jimp •
- Link
Rok uplatnění
Jimp - Článek v periodiku v databázi Web of Science
Výsledek na webu
Galois connections with hedges
We introduce (fuzzy) Galois connections with hedges. Fuzzy Galois connections attributes. Introducing hedges to Galois connections means introducing two parameters. The parameters influence the size of the set of all the fi...
BD - Teorie informace
- 2005 •
- D
Rok uplatnění
D - Stať ve sborníku
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