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6 062 (0,22s)

Result

A Developmental Method for Construction of Arbitrarily Large Sorting Networks and Adders

The paper deals with a non-traditional design method inspired by natural
ontogenesis (an embryonic approach) for construction of combinational logic
circuits (in particular sorting networks and adders). The general principle of the...

JC - Počítačový hardware a software

  • 2005
  • A
Result

Computing with Modular Robots

with a working circuit of a one-bit full adder. Complementarily a formalization...

Computer and information sciences

  • 2022
  • Jimp
  • Link
Result

Adder for 2.4 GHz band

In this paper, the design, optimization and construction of an adder for 2.4 GHz band is described. A comparison of measured simulation results is described too. The adder presented here has three input ports and is based on the Wil...

JA - Elektronika a optoelektronika, elektrotechnika

  • 2005
  • D
Result

IMPROVED DESIGN FOR MODULO 2n+1 ADDER

2n + 1 modular adders are widely used in Residue Number System arithmetic. Their performance is restricted due to the hardware implementation complexity. In this paper a novel circuit design for 2n + 1 adder has been proposed. This ...

JA - Elektronika a optoelektronika, elektrotechnika

  • 2010
  • D
Result

Evolutionary Design of Large Approximate Adders Optimized for Various Error Criteria

and circuit quality. In this work, evolutionary design of large approximate adders is analysed using a formal approach based on Binary Decision Diagrams. Compared......

Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

  • 2018
  • D
  • Link
Result

TWO MODULO 2n +/- 1 ADDERS BASED ON PREFIX COMPUTATION

Two novel designs of residue number system adders corresponding moduli 2n?1, 2n, which was inspired from the technique used in carry look-ahead adder (CLA modulo. The proposed modular adders were designed in such a way to b...

JA - Elektronika a optoelektronika, elektrotechnika

  • 2011
  • D
Result

Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates

TBD...

JC - Počítačový hardware a software

  • 2007
  • D
Result

NOVEL ARCHITECTURES OF MODULO 2n +/- 1 ADDERS FOR FIELD PROGRAMMABLE GATE ARRAY

This paper presents two new architectures of residue number system adders for moduli 2n-1, 2n+1. These two architectures allow efficient implementation on Field tospeed up the computation time and get rid of the necessity to a second add...

JA - Elektronika a optoelektronika, elektrotechnika

  • 2011
  • D
Result

Efficient Implementation of Bi-functional RTL Components - Case Study

, validity of this assumption is demonstrated through a design of bi-functional adder/subtractor circuit. At the gate level, one-bit full adder/subtractor circuit was created and optimised. This circuit was subsequently utilised for...

Computer hardware and architecture

  • 2018
  • D
  • Link
Result

Frequency Synthesizer Based on Flying Adder Architecture and Phase Locked Loop

. Flying-Adder architecture is an emerging technique which is based on a new concept frequencysynthesizer architecture based on concept flying-adder and phase locked loop principle......

JA - Elektronika a optoelektronika, elektrotechnika

  • 2011
  • D
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