Wafers for Automotive and other Key applications using Memories, embedded in Ulsi Processors (WAKeMeUP)
Public support
Provider
Ministry of Education, Youth and Sports
Programme
—
Call for proposals
—
Main participants
Ústav teorie informace a automatizace AV ČR, v. v. i.
Contest type
M2 - International cooperation
Contract ID
MSMT-22723/2018-17/1
Alternative language
Project name in Czech
Wafers for Automotive and other Key applications using Memories, embedded in Ulsi Processors (WAKeMeUP)
Annotation in Czech
The WAKeMeUP project objective is to set-up a pilot line for advanced microcontrollers with embedded non-volatile memory, design and manufacturing for the prototyping of innovative applications for the smart mobility and smart society domains. The project will target the industrialisation of the embedded Phase Change Memory (ePCM) technology built on top of the FDSOI 28nm logic process pilot line. The development of the ePCM will be driven by the final application requirements as well as decreasing the power consumption.
Scientific branches
R&D category
AP - Applied research
OECD FORD - main branch
20205 - Automation and control systems
OECD FORD - secondary branch
20206 - Computer hardware and architecture
OECD FORD - another secondary branch
20204 - Robotics and automatic control
CEP - equivalent branches <br>(according to the <a href="http://www.vyzkum.cz/storage/att/E6EF7938F0E854BAE520AC119FB22E8D/Prevodnik_oboru_Frascati.pdf">converter</a>)
JC - Computer hardware and software<br>JD - Use of computers, robotics and its application
Completed project evaluation
Provider evaluation
V - Vynikající výsledky projektu (s mezinárodním významem atd.)
Project results evaluation
Project designed and implemented set of benchmark tests in form of SW projects for STM32H7 family of microcontrollers ARM M7 and M4 on single device. Project implemented demonstrators of STM32H7 terminal with ARM Cortex A9 and A53 processor on Zynq and Zynq Ultrascale+ devices with Debian OS and Scilab SW with HW accelerators implemented in programmable logic of the device.
Solution timeline
Realization period - beginning
May 1, 2018
Realization period - end
Aug 31, 2021
Project status
U - Finished project
Latest support payment
Feb 12, 2021
Data delivery to CEP
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data delivery code
CEP22-MSM-8A-U
Data delivery date
Jun 28, 2022
Finance
Total approved costs
8,180 thou. CZK
Public financial support
5,319 thou. CZK
Other public sources
0 thou. CZK
Non public and foreign sources
2,861 thou. CZK