Analytic Approach to RTL Testability Analysis

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F01%3APU28712" target="_blank" >RIV/00216305:26220/01:PU28712 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Analytic Approach to RTL Testability Analysis
Original language description
The paper deals with analytical approach to the RTL testability analysis and its results. Approach is based as on circuit i path analysis, finding i paths existence conditions and the ways in which these conditions could be set, as on difficult to control/observe nodes location. On these testability analysis results basis, UUA (Unit Under Analysis) modification is suggested. This modification is based on insertion of selected registers into scan chain in order to improve controllability/observability pproperties of previously located difficult to control/observe nodes. The goal of presented methodology is to maximally utilise current UUA structure for future test application to reduce necessary modifications for UUA testability improvements suggested by UUA testability analysis results.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F01%2F1531" target="_blank" >GA102/01/1531: Formal approaches in digital circuit diagnostics - testable design verification</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2001
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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