Application Possibilities of VDCC In General Floating Element Simulator Circuit
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F15%3APU115035" target="_blank" >RIV/00216305:26220/15:PU115035 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/ECCTD.2015.7300064" target="_blank" >http://dx.doi.org/10.1109/ECCTD.2015.7300064</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ECCTD.2015.7300064" target="_blank" >10.1109/ECCTD.2015.7300064</a>
Alternative languages
Result language
angličtina
Original language name
Application Possibilities of VDCC In General Floating Element Simulator Circuit
Original language description
In this study, a low-voltage design of a new general floating element simulator circuit for realizing floating frequency dependent negative resistor (FDNR), floating inductor (FI), floating capacitor (FC), and floating resistor (FR) simulator, depending on the selection of passive circuit elements, is described. The circuit employs two voltage differencing current conveyors (VDCCs) at low voltage levels (±0.45 V) and three passive components. It does not require any passive element matching. Moreover, the new general floating element simulator can be electronically controllable by changing the bias currents of the VDCCs or can be controlled through the grounded resistor or capacitors. Finally, using one of the described floating element simulator, i.e. FDNR, a fourth-order Butterworth characteristic band-pass filter is simulated via PSPICE using 90 nm, level 7 PTM CMOS technology parameters. The simulations agree with the theoretical analysis.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2015
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 2015 22nd European Conference on Circuit Theory and Design (ECCTD2015)
ISBN
978-1-4799-9876-0
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
1-4
Publisher name
Neuveden
Place of publication
Neuveden
Event location
Trondheim
Event date
Aug 24, 2015
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000380498200046