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General floating element simulator employing VDCCs and grounded components

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F15%3APU115800" target="_blank" >RIV/00216305:26220/15:PU115800 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    General floating element simulator employing VDCCs and grounded components

  • Original language description

    In this study, a new general floating element simulator circuit employing two voltage differencing current conveyors (VDCCs) and three passive components is proposed. Depending on the passive component selection the presented circuit can realize floatingfrequency dependent negative resistor (FDNR), floating inductor, floating capacitor, and floating resistor simulator circuits. The circuit does not require any component matching conditions. Moreover, the proposed FDNR, inductance, capacitor and resistor simulator can be tuned electronically by changing the biasing current of the VDCC or can be controlled through the grounded resistor(s) if voltage controlled resistor is considered. The proposed floating inductor or capacitor simulators are verified involtage-mode 3rd-order elliptic low-pass filter circuit simulated via SPICE using 90 nm, level 7 PTM CMOS technology parameters.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JA - Electronics and optoelectronics

  • OECD FORD branch

Result continuities

  • Project

  • Continuities

    S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2015

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the 21st Conference STUDENT EEICT 2015

  • ISBN

    978-80-214-5148-3

  • ISSN

  • e-ISSN

  • Number of pages

    3

  • Pages from-to

    329-331

  • Publisher name

    Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií

  • Place of publication

    Brno

  • Event location

    Brno

  • Event date

    Apr 23, 2015

  • Type of event by nationality

    CST - Celostátní akce

  • UT code for WoS article