Implementation of retargetable configurable CORDIC algorithm for FPGA devices
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F16%3APU120086" target="_blank" >RIV/00216305:26220/16:PU120086 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Implementation of retargetable configurable CORDIC algorithm for FPGA devices
Original language description
This paper s dealing with the implementation of the CORDIC algorithm for FPGA. The implementation will be used in the high accuracy electric energy meter, so the main parameter of the implementation is focused on the result precision. The paper shows basics of the CORDIC algorith principles, basic blocks of the implementation and its simulations.
Czech name
—
Czech description
—
Classification
Type
D - Article in proceedings
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
—
Result continuities
Project
—
Continuities
S - Specificky vyzkum na vysokych skolach
Others
Publication year
2016
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Sborník příspěvků studentské konference Blansko 2016
ISBN
978-80-214-5389-0
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
59-62
Publisher name
Vysoké učení technické v Brně
Place of publication
Brno
Event location
Blansko, Czech republic
Event date
Aug 29, 2016
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
—