Advanced Mapping Techniques for Digital Signal Processors

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F16%3APU120950" target="_blank" >RIV/00216305:26220/16:PU120950 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/ICCES.2018.8639186" target="_blank" >http://dx.doi.org/10.1109/ICCES.2018.8639186</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ICCES.2018.8639186" target="_blank" >10.1109/ICCES.2018.8639186</a>

Result language
angličtina
Original language name
Advanced Mapping Techniques for Digital Signal Processors
Original language description
This paper is focused on the hardware modeling and mapping the algorithms on the many-, multi -core platforms, such as TMS320C6678 digital signal processor (DSP) with the very long instruction word (VLIW) architecture. The main methods to develop an application for the target processor combine high- and/or low-level programming languages. Although the hardware capabilities of the nowadays processors and compilers are persistently increasing, the programmers common practice is to hand-optimize critical parts of the digital signal processing algorithms in assembly code. In the paper the benefit of the auxiliary tool for generating of semi-optimal codes for the DSP is presented. The functions for basic vector operations (addition, multiplication, and dot product) were proposed by this tool and the computing performances were compared to the corresponding functions from the TMS320C6000 DSP Library (DSPLIB). Comparing the functions' duration, the proposed routines achieve the average acceleration of 24 CPU cycles.
Czech name
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Czech description
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Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2016
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
16th IEEE International Symposium on Signal Processing and Information Technology
ISBN
978-1-5090-2902-0
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
1-4
Publisher name
IEEE
Place of publication
Cyprus
Event location
Limassol
Event date
Dec 12, 2016
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000406122500039

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