Bulk-driven class AB fully-balanced differential difference amplifier
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F17%3APU123316" target="_blank" >RIV/00216305:26220/17:PU123316 - isvavai.cz</a>
Alternative codes found
RIV/68407700:21460/17:00320939
Result on the web
<a href="http://dx.doi.org/10.1007/s10470-017-1024-1" target="_blank" >http://dx.doi.org/10.1007/s10470-017-1024-1</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1007/s10470-017-1024-1" target="_blank" >10.1007/s10470-017-1024-1</a>
Alternative languages
Result language
angličtina
Original language name
Bulk-driven class AB fully-balanced differential difference amplifier
Original language description
This paper presents a new low-voltage class AB fully-balanced differential difference amplifier (FB-DDA) employing the bulk-driven technique. At the FB-DDA differential pairs the bulk terminal of the MOS transistors are used as signal inputs in order to increase the common-mode input range (ICM) under low supply voltage. At the class AB output stages the bulk terminal of the MOS transistors are used as control inputs in order to adjust the quiescent currents and compensate them against the process and temperatures (P/T) variation. The voltage supply of the FB-DDA is 0.7 V and the quiescent power consumption is 8.3 uW. The open loop voltage gain is 68 dB and the gain-bandwidth product (GBW) is 168 kHz for 10 pF capacitive load. The circuit performance was simulated in Cadence/Spectre environment using the TSMC 0.18 um CMOS process.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
<a href="/en/project/LO1401" target="_blank" >LO1401: Interdisciplinary Research of Wireless Technologies</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2017
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
ISSN
0925-1030
e-ISSN
1573-1979
Volume of the periodical
2017 (93)
Issue of the periodical within the volume
1, IF: 0.623
Country of publishing house
NL - THE KINGDOM OF THE NETHERLANDS
Number of pages
9
Pages from-to
179-187
UT code for WoS article
000410451100017
EID of the result in the Scopus database
2-s2.0-85024496921