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A 0.5-V 95-dB rail-to-rail DDA for biosignal processing

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21460%2F22%3A00358192" target="_blank" >RIV/68407700:21460/22:00358192 - isvavai.cz</a>

  • Alternative codes found

    RIV/00216305:26220/22:PU144638

  • Result on the web

    <a href="https://doi.org/10.1016/j.aeue.2021.154098" target="_blank" >https://doi.org/10.1016/j.aeue.2021.154098</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1016/j.aeue.2021.154098" target="_blank" >10.1016/j.aeue.2021.154098</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    A 0.5-V 95-dB rail-to-rail DDA for biosignal processing

  • Original language description

    This paper presents a new low-voltage CMOS structure for differential difference amplifier (DDA) optimized for low frequency biosignal processing. The DDA input stage is based on a non-tailed bulk-driven (BD) differential pair offering rail-to-rail input common mode range (ICMR) under 0.5 V voltage supply. Unlike the conventional two differential pairs DDA structure, the proposed one employs one differential pair created by the multiple input MOS transistor (MI-MOST) technique offering simple circuitry. Although the bulk-driven and the MI MOST techniques reduce the amplifier's transconductance, the gain is boosted by increasing the output resistance using a self-cascode transistor and a partial positive feedback. As a result, a 95-dB voltage gain is achieved which is larger than achieved gain for most sub-0.5 V designs presented in the literature. The DDA has 12.66 kHz gain bandwidth product, and consumes 313nW of power. The input thermal noise is 0.88 mu V/Hz1/2 and the average slew-rate is 14.7 V/ms at 20pF load capacitance. As an example of application, a band-pass filter (BPF) based on two DDAs with adjustable gain for electrocardiogram (ECG) signal processing is presented. The 0.18 mu m CMOS technology from TSMC has been used and extensive simulation results in Cadence environment including process, voltage and temperature corners and Monte-Carlo analysis have been carried-out to demonstrate the robustness of the design.

  • Czech name

  • Czech description

Classification

  • Type

    J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

  • Continuities

    I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Others

  • Publication year

    2022

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Name of the periodical

    AEU-International Journal of Electronics and Communications

  • ISSN

    1434-8411

  • e-ISSN

    1618-0399

  • Volume of the periodical

    145

  • Issue of the periodical within the volume

    2

  • Country of publishing house

    DE - GERMANY

  • Number of pages

    9

  • Pages from-to

    1-9

  • UT code for WoS article

    000795779000003

  • EID of the result in the Scopus database

    2-s2.0-85121963434