Design and implementation of sub 0.5-V OTAs in 0.18 um CMOS
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F18%3APU126607" target="_blank" >RIV/00216305:26220/18:PU126607 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1002/cta.2465" target="_blank" >http://dx.doi.org/10.1002/cta.2465</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1002/cta.2465" target="_blank" >10.1002/cta.2465</a>
Alternative languages
Result language
angličtina
Original language name
Design and implementation of sub 0.5-V OTAs in 0.18 um CMOS
Original language description
A family of bulk-driven CMOS operational transconductance amplifiers (OTAs) has been designed for extremely low supply voltages (0.3-0.5V). Three OTA design schemes with different gain boosting techniques and class AB input/output stages are discussed. A detailed comparison among these schemes has been presented in terms of performance characteristics such as voltage gain, gain bandwidth product (GBW), slew rate (SR), circuit sensitivity to process/mismatch variations and silicon area. The design procedures for all the compared structures have been developed. The OTAs have been fabricated in a standard 0.18 um n-well CMOS process from TSMC. Chip test results are in good agreement with theoretical predictions and simulations.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
International Journal of Circuit Theory and Applications.
ISSN
0098-9886
e-ISSN
1097-007X
Volume of the periodical
46
Issue of the periodical within the volume
, IF: 1.444
Country of publishing house
GB - UNITED KINGDOM
Number of pages
15
Pages from-to
1129-1143
UT code for WoS article
000434415200001
EID of the result in the Scopus database
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