Chaotic admittance with commercially available active elements
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F18%3APU128612" target="_blank" >RIV/00216305:26220/18:PU128612 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/8436859" target="_blank" >https://ieeexplore.ieee.org/document/8436859</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.23919/MIXDES.2018.8436859" target="_blank" >10.23919/MIXDES.2018.8436859</a>
Alternative languages
Result language
angličtina
Original language name
Chaotic admittance with commercially available active elements
Original language description
This paper describes systematic design and shows experimental verification of two-terminal analog circuit element that exhibits chaotic behavior. This means that for specific input harmonic voltage driving force input current can be chaotic. It is demonstrated that strange and non-chaotic attractors alternate with the continuous change of amplitude and/or frequency of the input signal. Large gallery of the oscilloscope screenshots proves that observed strange attractors are structurally stable, in a good agreement with theory and do not represent numerical artifacts. Finally, some practical applications of a constructed circuitry are briefly discussed.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
<a href="/en/project/LO1401" target="_blank" >LO1401: Interdisciplinary Research of Wireless Technologies</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 25th International Conference Mixed Design of Integrated Circuits and Systems
ISBN
978-83-63578-13-8
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
355-360
Publisher name
IEEE
Place of publication
Gdynia, Poland
Event location
Gdynia
Event date
Jun 21, 2018
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000480458200062