Electronically reconfigurable two-path fractional-order PI/D controller employing constant phase blocks based on bilinear segments using CMOS modified current differencing unit
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU132052" target="_blank" >RIV/00216305:26220/19:PU132052 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1016/j.mejo.2019.03.003" target="_blank" >http://dx.doi.org/10.1016/j.mejo.2019.03.003</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1016/j.mejo.2019.03.003" target="_blank" >10.1016/j.mejo.2019.03.003</a>
Alternative languages
Result language
angličtina
Original language name
Electronically reconfigurable two-path fractional-order PI/D controller employing constant phase blocks based on bilinear segments using CMOS modified current differencing unit
Original language description
This work introduces a versatile type of electronically controllable bilinear transfer segments, i.e. two ports allowing independent electronic control of zero and pole of transfer function, based on modified current differencing unit (MCDU) active element. These proposed bilinear transfer segments serve for construction of fractional-order constant phase block (phi(alpha) = +/- 15 degrees and +/- 36 degrees, i.e. orders alpha = +/- 1/6 and +/- 2/5, tested in our case) representing electronically controllable integrator or differentiator (in dependence on current demand) as a part of novel two-path system of the fractional-order proportional-integral or derivative (FOPI/D) controller. The example of design procedure employs four bilinear transfer segments, electronically controllable proportional path and summing stage. Cadence IC6 Spectre simulation results (TSMC 0.18 mu m CMOS process) in both frequency and time domain are performed in order to confirm expected behavior of the system. An application of the proposed FOPI controller in control of linear voltage regulator is also demonstrated and performance improvements of the proposed design are discussed.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
Microelectronics Journal
ISSN
0026-2692
e-ISSN
1879-2391
Volume of the periodical
86
Issue of the periodical within the volume
1
Country of publishing house
GB - UNITED KINGDOM
Number of pages
16
Pages from-to
114-129
UT code for WoS article
000464358900014
EID of the result in the Scopus database
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