Designing series of fractional-order elements
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F21%3APU142840" target="_blank" >RIV/00216305:26220/21:PU142840 - isvavai.cz</a>
Result on the web
<a href="https://link.springer.com/content/pdf/10.1007/s10470-021-01811-4.pdf" target="_blank" >https://link.springer.com/content/pdf/10.1007/s10470-021-01811-4.pdf</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1007/s10470-021-01811-4" target="_blank" >10.1007/s10470-021-01811-4</a>
Alternative languages
Result language
angličtina
Original language name
Designing series of fractional-order elements
Original language description
In this paper we propose an efficient approach to design fractional-order elements' (FOEs) series, while using a very limited set of "seed" FOEs. The proposed approach follows the idea of general immittance inverter/converter, whereas a suitable circuit solution employing operational transconductance amplifiers is also presented and can be used for the design of grounded FOEs with the fractional order alpha being in the range [-2,2]. The proposed circuit may simply be extended to design fractional-order elements from wider range of alpha to follow designers' requirements. To show the efficiency of the described technique, the use of only up to two "seed" FOEs with properly selected fractional order alpha seed as passive elements results in the design of a series of 17 FOEs with different alpha being in the range [-2,2]. Cadence post-layout simulation results are presented that prove operability and robustness of our design concept. Basic fractional 1.75-order low-pass filter is also presented to show the utilization of a FOE being implemented by the proposed GIC.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
—
OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
<a href="/en/project/GA19-24585S" target="_blank" >GA19-24585S: Synthesis of reliable electrical phantoms describing fractional impedance behavior of real-world systems</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2021
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
ISSN
0925-1030
e-ISSN
1573-1979
Volume of the periodical
106
Issue of the periodical within the volume
3
Country of publishing house
NL - THE KINGDOM OF THE NETHERLANDS
Number of pages
11
Pages from-to
553-563
UT code for WoS article
000626344200001
EID of the result in the Scopus database
2-s2.0-85102287977