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On Systematic Design of Fractional-Order Element Series

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F21%3APU139412" target="_blank" >RIV/00216305:26220/21:PU139412 - isvavai.cz</a>

  • Result on the web

    <a href="https://www.mdpi.com/1424-8220/21/4/1203/htm" target="_blank" >https://www.mdpi.com/1424-8220/21/4/1203/htm</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.3390/s21041203" target="_blank" >10.3390/s21041203</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    On Systematic Design of Fractional-Order Element Series

  • Original language description

    In this paper a concept for the efficient design of a series of floating fractional-order elements (FOEs) is proposed. Using even single or a very limited number of so-called “seed” FOEs it is possible to obtain a wide set of new FOEs featuring fractional order α being in the range [-n,n], where n is an arbitrary integer number, and hence enables to overcome the lack of commercial unavailability of FOEs. The systematic design stems from the utilization of a general immittance converter (GIC), whereas the concept is further developed by proposing a general circuit structure of the GIC that employs operational transconductance amplifiers (OTAs) as active elements. To show the efficiency of the presented approach, the use of only up to two “seed” FOEs with a properly selected fractional order αseed as passive elements results in the design of a series of 51 FOEs with different α being in the range [-2,2] that may find their utilization in sensor applications and the design of analog signal processing blocks. Comprehensive analysis of the proposed GIC is given, whereas the effect of parasitic properties of the assumed active elements is determined and the optimization process described to improve the overall performance of the GIC. Using OTAs designed in 0.18 μμm TSMC CMOS technology, Cadence Virtuoso post-layout simulation results of the GIC are presented that prove its operability, performance optimization, and robustness of the proposed design concept.

  • Czech name

  • Czech description

Classification

  • Type

    J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

    <a href="/en/project/GA19-24585S" target="_blank" >GA19-24585S: Synthesis of reliable electrical phantoms describing fractional impedance behavior of real-world systems</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2021

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Name of the periodical

    SENSORS

  • ISSN

    1424-8220

  • e-ISSN

    1424-3210

  • Volume of the periodical

    21

  • Issue of the periodical within the volume

    4

  • Country of publishing house

    CH - SWITZERLAND

  • Number of pages

    23

  • Pages from-to

    1-23

  • UT code for WoS article

    000624704200001

  • EID of the result in the Scopus database